In order to produce a semiconductor device, an element isolation region is formed in a semiconductor substrate, and a semiconductor element such as a MISFET (Metal Insulator Semiconductor Field Effect Transistor) is formed in an active region of a semiconductor substrate defined by the element isolation region, and a multilayer wiring structure is formed on the semiconductor substrate. Also, there is a technique using an SOI substrate as a semiconductor substrate.
Japanese Patent Application Laid-Open Publication No. 2015-27068 (Patent Document 1) relates to an MISFET using an SOI substrate so that the SOI substrate includes a support substrate 1, a BOX layer 2a formed on the support substrate 1, and an SOI layer 3a formed on the BOX layer 2a. For example, in FIG. 11, a plurality of p-channel type MISFETs QP5 are formed on the SOI layer 3a on an n-type well 5 of the support substrate 1, and a substrate bias Vbp is applied to the n-type well 5 through a first wiring 16.